Silicon on Insulator Wafers from Semicera are designed to meet the growing demand for high-performance semiconductor solutions. Our SOI wafers offer superior electrical performance and reduced parasitic device capacitance, making them ideal for advanced applications such as MEMS devices, sensors, and integrated circuits. Semicera’s expertise in wafer production ensures that each SOI wafer provides reliable, high-quality results for your next-generation technology needs.
Our Silicon on Insulator Wafers offer an optimal balance between cost-effectiveness and performance. With soi wafer cost becoming increasingly competitive, these wafers are widely used in a range of industries, including microelectronics and optoelectronics. Semicera's high-precision production process guarantees superior wafer bonding and uniformity, making them suitable for a variety of applications, from cavity SOI wafers to standard silicon wafers.
Key Features:
• High-quality SOI wafers optimized for performance in MEMS and other applications.
• Competitive soi wafer cost for businesses seeking advanced solutions without compromising quality.
• Ideal for cutting-edge technologies, offering enhanced electrical isolation and efficiency in silicon on insulator systems.
Our Silicon on Insulator Wafers are engineered to provide high-performance solutions, supporting the next wave of innovation in semiconductor technology. Whether you're working on cavity SOI wafers, MEMS devices, or silicon on insulator components, Semicera delivers wafers that meet the highest standards in the industry.
Items |
Production |
Research |
Dummy |
Crystal Parameters |
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Polytype |
4H |
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Surface orientation error |
<11-20 >4±0.15° |
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Electrical Parameters |
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Dopant |
n-type Nitrogen |
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Resistivity |
0.015-0.025ohm·cm |
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Mechanical Parameters |
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Diameter |
150.0±0.2mm |
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Thickness |
350±25 μm |
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Primary flat orientation |
[1-100]±5° |
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Primary flat length |
47.5±1.5mm |
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Secondary flat |
None |
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TTV |
≤5 μm |
≤10 μm |
≤15 μm |
LTV |
≤3 μm(5mm*5mm) |
≤5 μm(5mm*5mm) |
≤10 μm(5mm*5mm) |
Bow |
-15μm ~ 15μm |
-35μm ~ 35μm |
-45μm ~ 45μm |
Warp |
≤35 μm |
≤45 μm |
≤55 μm |
Front(Si-face) roughness(AFM) |
Ra≤0.2nm (5μm*5μm) |
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Structure |
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Micropipe density |
<1 ea/cm2 |
<10 ea/cm2 |
<15 ea/cm2 |
Metal impurities |
≤5E10atoms/cm2 |
NA |
|
BPD |
≤1500 ea/cm2 |
≤3000 ea/cm2 |
NA |
TSD |
≤500 ea/cm2 |
≤1000 ea/cm2 |
NA |
Front Quality |
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Front |
Si |
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Surface finish |
Si-face CMP |
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Particles |
≤60ea/wafer (size≥0.3μm) |
NA |
|
Scratches |
≤5ea/mm. Cumulative length ≤Diameter |
Cumulative length≤2*Diameter |
NA |
Orange peel/pits/stains/striations/ cracks/contamination |
None |
NA |
|
Edge chips/indents/fracture/hex plates |
None |
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Polytype areas |
None |
Cumulative area≤20% |
Cumulative area≤30% |
Front laser marking |
None |
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Back Quality |
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Back finish |
C-face CMP |
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Scratches |
≤5ea/mm,Cumulative length≤2*Diameter |
NA |
|
Back defects (edge chips/indents) |
None |
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Back roughness |
Ra≤0.2nm (5μm*5μm) |
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Back laser marking |
1 mm (from top edge) |
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Edge |
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Edge |
Chamfer |
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Packaging |
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Packaging |
Epi-ready with vacuum packaging Multi-wafer cassette packaging |
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*Notes: "NA" means no request Items not mentioned may refer to SEMI-STD. |