Silicon Carbide Epitaxy

Short Description:

Silicon Carbide Epitaxy – High-quality epitaxial layers tailored for advanced semiconductor applications, offering superior performance and reliability for power electronics and optoelectronic devices.


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Semicera’s Silicon Carbide Epitaxy is engineered to meet the rigorous demands of modern semiconductor applications. By utilizing advanced epitaxial growth techniques, we ensure that each silicon carbide layer exhibits exceptional crystalline quality, uniformity, and minimal defect density. These characteristics are crucial for developing high-performance power electronics, where efficiency and thermal management are paramount.

The Silicon Carbide Epitaxy process at Semicera is optimized to produce epitaxial layers with precise thickness and doping control, ensuring consistent performance across a range of devices. This level of precision is essential for applications in electric vehicles, renewable energy systems, and high-frequency communications, where reliability and efficiency are critical.

Moreover, Semicera’s Silicon Carbide Epitaxy offers enhanced thermal conductivity and higher breakdown voltage, making it the preferred choice for devices that operate under extreme conditions. These properties contribute to longer device lifetimes and improved overall system efficiency, particularly in high-power and high-temperature environments.

Semicera also provides customization options for Silicon Carbide Epitaxy, allowing for tailored solutions that meet specific device requirements. Whether for research or large-scale production, our epitaxial layers are designed to support the next generation of semiconductor innovations, enabling the development of more powerful, efficient, and reliable electronic devices.

By integrating cutting-edge technology and stringent quality control processes, Semicera ensures that our Silicon Carbide Epitaxy products not only meet but exceed industry standards. This commitment to excellence makes our epitaxial layers the ideal foundation for advanced semiconductor applications, paving the way for breakthroughs in power electronics and optoelectronics.

Items

Production

Research

Dummy

Crystal Parameters

Polytype

4H

Surface orientation error

<11-20 >4±0.15°

Electrical Parameters

Dopant

n-type Nitrogen

Resistivity

0.015-0.025ohm·cm

Mechanical Parameters

Diameter

150.0±0.2mm

Thickness

350±25 μm

Primary flat orientation

[1-100]±5°

Primary flat length

47.5±1.5mm

Secondary flat

None

TTV

≤5 μm

≤10 μm

≤15 μm

LTV

≤3 μm(5mm*5mm)

≤5 μm(5mm*5mm)

≤10 μm(5mm*5mm)

Bow

-15μm ~ 15μm

-35μm ~ 35μm

-45μm ~ 45μm

Warp

≤35 μm

≤45 μm

≤55 μm

Front(Si-face) roughness(AFM)

Ra≤0.2nm (5μm*5μm)

Structure

Micropipe density

<1 ea/cm2

<10 ea/cm2

<15 ea/cm2

Metal impurities

≤5E10atoms/cm2

NA

BPD

≤1500 ea/cm2

≤3000 ea/cm2

NA

TSD

≤500 ea/cm2

≤1000 ea/cm2

NA

Front Quality

Front

Si

Surface finish

Si-face CMP

Particles

≤60ea/wafer (size≥0.3μm)

NA

Scratches

≤5ea/mm. Cumulative length ≤Diameter

Cumulative length≤2*Diameter

NA

Orange peel/pits/stains/striations/ cracks/contamination

None

NA

Edge chips/indents/fracture/hex plates

None

Polytype areas

None

Cumulative area≤20%

Cumulative area≤30%

Front laser marking

None

Back Quality

Back finish

C-face CMP

Scratches

≤5ea/mm,Cumulative length≤2*Diameter

NA

Back defects (edge chips/indents)

None

Back roughness

Ra≤0.2nm (5μm*5μm)

Back laser marking

1 mm (from top edge)

Edge

Edge

Chamfer

Packaging

Packaging

Epi-ready with vacuum packaging

Multi-wafer cassette packaging

*Notes: "NA" means no request Items not mentioned may refer to SEMI-STD.

tech_1_2_size
SiC wafers

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