P-type SiC Substrate Wafer

Short Description:

Semicera’s P-type SiC Substrate Wafer is engineered for superior electronic and optoelectronic applications. These wafers provide exceptional conductivity and thermal stability, making them ideal for high-performance devices. With Semicera, expect precision and reliability in your P-type SiC substrate wafers.


Product Detail

Product Tags

Semicera’s P-type SiC Substrate Wafer is a key component for developing advanced electronic and optoelectronic devices. These wafers are specifically designed to provide enhanced performance in high-power and high-temperature environments, supporting the growing demand for efficient and durable components.

The P-type doping in our SiC wafers ensures improved electrical conductivity and charge carrier mobility. This makes them particularly suitable for applications in power electronics, LEDs, and photovoltaic cells, where low power loss and high efficiency are critical.

Manufactured with the highest standards of precision and quality, Semicera’s P-type SiC wafers offer excellent surface uniformity and minimal defect rates. These characteristics are vital for industries where consistency and reliability are essential, such as aerospace, automotive, and renewable energy sectors.

Semicera’s commitment to innovation and excellence is evident in our P-type SiC Substrate Wafer. By integrating these wafers into your production process, you ensure that your devices benefit from the exceptional thermal and electrical properties of SiC, enabling them to operate effectively under challenging conditions.

Investing in Semicera’s P-type SiC Substrate Wafer means choosing a product that combines cutting-edge material science with meticulous engineering. Semicera is dedicated to supporting the next generation of electronic and optoelectronic technologies, providing the essential components needed for your success in the semiconductor industry.

Items

Production

Research

Dummy

Crystal Parameters

Polytype

4H

Surface orientation error

<11-20 >4±0.15°

Electrical Parameters

Dopant

n-type Nitrogen

Resistivity

0.015-0.025ohm·cm

Mechanical Parameters

Diameter

150.0±0.2mm

Thickness

350±25 μm

Primary flat orientation

[1-100]±5°

Primary flat length

47.5±1.5mm

Secondary flat

None

TTV

≤5 μm

≤10 μm

≤15 μm

LTV

≤3 μm(5mm*5mm)

≤5 μm(5mm*5mm)

≤10 μm(5mm*5mm)

Bow

-15μm ~ 15μm

-35μm ~ 35μm

-45μm ~ 45μm

Warp

≤35 μm

≤45 μm

≤55 μm

Front(Si-face) roughness(AFM)

Ra≤0.2nm (5μm*5μm)

Structure

Micropipe density

<1 ea/cm2

<10 ea/cm2

<15 ea/cm2

Metal impurities

≤5E10atoms/cm2

NA

BPD

≤1500 ea/cm2

≤3000 ea/cm2

NA

TSD

≤500 ea/cm2

≤1000 ea/cm2

NA

Front Quality

Front

Si

Surface finish

Si-face CMP

Particles

≤60ea/wafer (size≥0.3μm)

NA

Scratches

≤5ea/mm. Cumulative length ≤Diameter

Cumulative length≤2*Diameter

NA

Orange peel/pits/stains/striations/ cracks/contamination

None

NA

Edge chips/indents/fracture/hex plates

None

Polytype areas

None

Cumulative area≤20%

Cumulative area≤30%

Front laser marking

None

Back Quality

Back finish

C-face CMP

Scratches

≤5ea/mm,Cumulative length≤2*Diameter

NA

Back defects (edge chips/indents)

None

Back roughness

Ra≤0.2nm (5μm*5μm)

Back laser marking

1 mm (from top edge)

Edge

Edge

Chamfer

Packaging

Packaging

Epi-ready with vacuum packaging

Multi-wafer cassette packaging

*Notes: "NA" means no request Items not mentioned may refer to SEMI-STD.

tech_1_2_size
SiC wafers

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