1. Overview
Heating, also known as thermal processing, refers to manufacturing procedures that operate at high temperatures, usually higher than the melting point of aluminum.
The heating process is usually carried out in a high-temperature furnace and includes major processes such as oxidation, impurity diffusion, and annealing for crystal defect repair in semiconductor manufacturing.
Oxidation: It is a process in which a silicon wafer is placed in an atmosphere of oxidants such as oxygen or water vapor for high-temperature heat treatment, causing a chemical reaction on the surface of the silicon wafer to form an oxide film.
Impurity diffusion: refers to the use of thermal diffusion principles under high temperature conditions to introduce impurity elements into the silicon substrate according to process requirements, so that it has a specific concentration distribution, thereby changing the electrical properties of the silicon material.
Annealing refers to the process of heating the silicon wafer after ion implantation to repair the lattice defects caused by ion implantation.
There are three basic types of equipment used for oxidation/diffusion/annealing:
- Horizontal furnace;
- Vertical furnace;
- Rapid heating furnace: rapid heat treatment equipment
Traditional heat treatment processes mainly use long-term high-temperature treatment to eliminate damage caused by ion implantation, but its disadvantages are incomplete defect removal and low activation efficiency of implanted impurities.
In addition, due to the high annealing temperature and long time, impurity redistribution is likely to occur, causing a large amount of impurities to diffuse and fail to meet the requirements of shallow junctions and narrow impurity distribution.
Rapid thermal annealing of ion-implanted wafers using rapid thermal processing (RTP) equipment is a heat treatment method that heats the entire wafer to a certain temperature (generally 400-1300°C) in a very short time.
Compared with furnace heating annealing, it has the advantages of less thermal budget, smaller range of impurity movement in the doping area, less pollution and shorter processing time.
The rapid thermal annealing process can use a variety of energy sources, and the annealing time range is very wide (from 100 to 10-9s, such as lamp annealing, laser annealing, etc.). It can completely activate impurities while effectively suppressing impurity redistribution. It is currently widely used in high-end integrated circuit manufacturing processes with wafer diameters greater than 200mm.
2. Second heating process
2.1 Oxidation process
In the integrated circuit manufacturing process, there are two methods for forming silicon oxide films: thermal oxidation and deposition.
The oxidation process refers to the process of forming SiO2 on the surface of silicon wafers by thermal oxidation. The SiO2 film formed by thermal oxidation is widely used in the integrated circuit manufacturing process due to its superior electrical insulation properties and process feasibility.
Its most important applications are as follows:
- Protect devices from scratches and contamination;
- Limiting the field isolation of charged carriers (surface passivation);
- Dielectric materials in gate oxide or storage cell structures;
- Implant masking in doping;
- A dielectric layer between metal conductive layers.
(1) Device protection and isolation
SiO2 grown on the surface of a wafer (silicon wafer) can serve as an effective barrier layer to isolate and protect sensitive devices within the silicon.
Because SiO2 is a hard and non-porous (dense) material, it can be used to effectively isolate active devices on the silicon surface. The hard SiO2 layer will protect the silicon wafer from scratches and damage that may occur during the manufacturing process.
(2) Surface passivation
Surface passivation A major advantage of thermally grown SiO2 is that it can reduce the surface state density of silicon by constraining its dangling bonds, an effect known as surface passivation.
It prevents electrical degradation and reduces the path for leakage current caused by moisture, ions or other external contaminants. The hard SiO2 layer protects Si from scratches and process damage that may occur during post-production.
The SiO2 layer grown on the Si surface can bind the electrically active contaminants (mobile ion contamination) on the Si surface. Passivation is also important for controlling the leakage current of junction devices and growing stable gate oxides.
As a high-quality passivation layer, the oxide layer has quality requirements such as uniform thickness, no pinholes and voids.
Another factor in using an oxide layer as a Si surface passivation layer is the thickness of the oxide layer. The oxide layer must be thick enough to prevent the metal layer from charging due to charge accumulation on the silicon surface, which is similar to the charge storage and breakdown characteristics of ordinary capacitors.
SiO2 also has a very similar coefficient of thermal expansion to Si. Silicon wafers expand during high temperature processes and contract during cooling.
SiO2 expands or contracts at a rate very close to that of Si, which minimizes the warping of the silicon wafer during the thermal process. This also avoids the separation of the oxide film from the silicon surface due to film stress.
(3) Gate oxide dielectric
For the most commonly used and important gate oxide structure in MOS technology, an extremely thin oxide layer is used as the dielectric material. Since the gate oxide layer and the Si underneath have the characteristics of high quality and stability, the gate oxide layer is generally obtained by thermal growth.
SiO2 has a high dielectric strength (107V/m) and a high resistivity (about 1017Ω·cm).
The key to the reliability of MOS devices is the integrity of the gate oxide layer. The gate structure in MOS devices controls the flow of current. Because this oxide is the basis for the function of microchips based on field-effect technology,
Therefore, high quality, excellent film thickness uniformity and absence of impurities are its basic requirements. Any contamination that may degrade the function of the gate oxide structure must be strictly controlled.
(4) Doping barrier
SiO2 can be used as an effective masking layer for selective doping of silicon surface. Once an oxide layer is formed on the silicon surface, the SiO2 in the transparent part of the mask is etched to form a window through which the doping material can enter the silicon wafer.
Where there are no windows, oxide can protect the silicon surface and prevent impurities from diffusing, thus enabling selective impurity implantation.
Dopants move slowly in SiO2 compared to Si, so only a thin oxide layer is needed to block the dopants (note that this rate is temperature dependent).
A thin oxide layer (e.g., 150 Å thick) can also be used in areas where ion implantation is required, which can be used to minimize damage to the silicon surface.
It also allows for better control of junction depth during impurity implantation by reducing the channeling effect. After implantation, the oxide can be selectively removed with hydrofluoric acid to make the silicon surface flat again.
(5) Dielectric layer between metal layers
SiO2 does not conduct electricity under normal conditions, so it is an effective insulator between metal layers in microchips. SiO2 can prevent short circuits between the upper metal layer and the lower metal layer, just like the insulator on the wire can prevent short circuits.
The quality requirement for oxide is that it is free of pinholes and voids. It is often doped to obtain more effective fluidity, which can better minimize contamination diffusion. It is usually obtained by chemical vapor deposition rather than thermal growth.
Depending on the reaction gas, the oxidation process is usually divided into:
- Dry oxygen oxidation: Si + O2→SiO2;
- Wet oxygen oxidation: 2H2O (water vapor) + Si→SiO2+2H2;
- Chlorine-doped oxidation: Chlorine gas, such as hydrogen chloride (HCl), dichloroethylene DCE (C2H2Cl2) or its derivatives, is added to oxygen to improve the oxidation rate and the quality of the oxide layer.
(1) Dry oxygen oxidation process: The oxygen molecules in the reaction gas diffuse through the already formed oxide layer, reach the interface between SiO2 and Si, react with Si, and then form a SiO2 layer.
The SiO2 prepared by dry oxygen oxidation has a dense structure, uniform thickness, strong masking ability for injection and diffusion, and high process repeatability. Its disadvantage is that the growth rate is slow.
This method is generally used for high-quality oxidation, such as gate dielectric oxidation, thin buffer layer oxidation, or for starting oxidation and terminating oxidation during thick buffer layer oxidation.
(2) Wet oxygen oxidation process: Water vapor can be carried directly in oxygen, or it can be obtained by the reaction of hydrogen and oxygen. The oxidation rate can be changed by adjusting the partial pressure ratio of hydrogen or water vapor to oxygen.
Note that to ensure safety, the ratio of hydrogen to oxygen should not exceed 1.88:1. Wet oxygen oxidation is due to the presence of both oxygen and water vapor in the reaction gas, and water vapor will decompose into hydrogen oxide (HO) at high temperatures.
The diffusion rate of hydrogen oxide in silicon oxide is much faster than that of oxygen, so the wet oxygen oxidation rate is about one order of magnitude higher than the dry oxygen oxidation rate.
(3) Chlorine-doped oxidation process: In addition to traditional dry oxygen oxidation and wet oxygen oxidation, chlorine gas, such as hydrogen chloride (HCl), dichloroethylene DCE (C2H2Cl2) or its derivatives, can be added to oxygen to improve the oxidation rate and the quality of the oxide layer.
The main reason for the increase in oxidation rate is that when chlorine is added for oxidation, not only does the reactant contain water vapor that can accelerate oxidation, but chlorine also accumulates near the interface between Si and SiO2. In the presence of oxygen, chlorosilicon compounds are easily converted into silicon oxide, which can catalyze oxidation.
The main reason for the improvement of the oxide layer quality is that the chlorine atoms in the oxide layer can purify the activity of sodium ions, thereby reducing the oxidation defects introduced by sodium ion contamination of equipment and process raw materials. Therefore, chlorine doping is involved in most dry oxygen oxidation processes.
2.2 Diffusion process
Traditional diffusion refers to the transfer of substances from areas of higher concentration to areas of lower concentration until they are evenly distributed. The diffusion process follows Fick’s law. Diffusion can occur between two or more substances, and the concentration and temperature differences between different areas drive the distribution of substances to a uniform equilibrium state.
One of the most important properties of semiconductor materials is that their conductivity can be adjusted by adding different types or concentrations of dopants. In integrated circuit manufacturing, this process is usually achieved through doping or diffusion processes.
Depending on the design goals, semiconductor materials such as silicon, germanium or III-V compounds can obtain two different semiconductor properties, N-type or P-type, by doping with donor impurities or acceptor impurities.
Semiconductor doping is mainly carried out through two methods: diffusion or ion implantation, each with its own characteristics:
Diffusion doping is less expensive, but the concentration and depth of the doping material cannot be precisely controlled;
While ion implantation is relatively expensive, it allows for precise control of dopant concentration profiles.
Before the 1970s, the feature size of integrated circuit graphics was on the order of 10μm, and traditional thermal diffusion technology was generally used for doping.
The diffusion process is mainly used to modify semiconductor materials. By diffusing different substances into semiconductor materials, their conductivity and other physical properties can be changed.
For example, by diffusing the trivalent element boron into silicon, a P-type semiconductor is formed; by doping pentavalent elements phosphorus or arsenic, an N-type semiconductor is formed. When a P-type semiconductor with more holes comes into contact with an N-type semiconductor with more electrons, a PN junction is formed.
As feature sizes shrink, the isotropic diffusion process makes it possible for dopants to diffuse to the other side of the shield oxide layer, causing shorts between adjacent regions.
Except for some special uses (such as long-term diffusion to form uniformly distributed high-voltage resistant areas), the diffusion process has gradually been replaced by ion implantation.
However, in the technology generation below 10nm, since the size of the Fin in the three-dimensional fin field-effect transistor (FinFET) device is very small, ion implantation will damage its tiny structure. The use of solid source diffusion process may solve this problem.
2.3 Degradation process
The annealing process is also called thermal annealing. The process is to place the silicon wafer in a high temperature environment for a certain period of time to change the microstructure on the surface or inside of the silicon wafer to achieve a specific process purpose.
The most critical parameters in the annealing process are temperature and time. The higher the temperature and the longer the time, the higher the thermal budget.
In the actual integrated circuit manufacturing process, the thermal budget is strictly controlled. If there are multiple annealing processes in the process flow, the thermal budget can be expressed as the superposition of multiple heat treatments.
However, with the miniaturization of process nodes, the allowable thermal budget in the entire process becomes smaller and smaller, that is, the temperature of the high-temperature thermal process becomes lower and the time becomes shorter.
Usually, the annealing process is combined with ion implantation, thin film deposition, metal silicide formation and other processes. The most common is thermal annealing after ion implantation.
Ion implantation will impact the substrate atoms, causing them to break away from the original lattice structure and damage the substrate lattice. Thermal annealing can repair the lattice damage caused by ion implantation and can also move the implanted impurity atoms from the lattice gaps to the lattice sites, thereby activating them.
The temperature required for lattice damage repair is about 500°C, and the temperature required for impurity activation is about 950°C. In theory, the longer the annealing time and the higher the temperature, the higher the activation rate of impurities, but too high a thermal budget will lead to excessive diffusion of impurities, making the process uncontrollable and ultimately causing degradation of device and circuit performance.
Therefore, with the development of manufacturing technology, traditional long-term furnace annealing has gradually been replaced by rapid thermal annealing (RTA).
In the manufacturing process, some specific films need to undergo a thermal annealing process after deposition to change certain physical or chemical properties of the film. For example, a loose film becomes dense, changing its dry or wet etching rate;
Another commonly used annealing process occurs during the formation of metal silicide. Metal films such as cobalt, nickel, titanium, etc. are sputtered onto the surface of the silicon wafer, and after rapid thermal annealing at a relatively low temperature, the metal and silicon can form an alloy.
Certain metals form different alloy phases under different temperature conditions. Generally, it is hoped to form an alloy phase with lower contact resistance and body resistance during the process.
According to different thermal budget requirements, the annealing process is divided into high temperature furnace annealing and rapid thermal annealing.
- High temperature furnace tube annealing:
It is a traditional annealing method with high temperature, long annealing time and high budget.
In some special processes, such as oxygen injection isolation technology for preparing SOI substrates and deep-well diffusion processes, it is widely used. Such processes generally require a higher thermal budget to obtain a perfect lattice or uniform impurity distribution.
- Rapid Thermal Annealing:
It is the process of processing silicon wafers by extremely rapid heating/cooling and short dwelling at the target temperature, sometimes also called Rapid Thermal Processing (RTP).
In the process of forming ultra-shallow junctions, rapid thermal annealing achieves a compromise optimization between lattice defect repair, impurity activation, and minimization of impurity diffusion, and is indispensable in the manufacturing process of advanced technology nodes.
The temperature rise/fall process and the short stay at the target temperature together constitute the thermal budget of rapid thermal annealing.
Traditional rapid thermal annealing has a temperature of about 1000°C and takes seconds. In recent years, the requirements for rapid thermal annealing have become increasingly stringent, and flash annealing, spike annealing, and laser annealing have gradually developed, with annealing times reaching milliseconds, and even tending to develop toward microseconds and sub-microseconds.
3 . Three heating process equipment
3.1 Diffusion and oxidation equipment
The diffusion process mainly uses the principle of thermal diffusion under high temperature (usually 900-1200℃) conditions to incorporate impurity elements into the silicon substrate at a required depth to give it a specific concentration distribution, in order to change the electrical properties of the material and form a semiconductor device structure.
In silicon integrated circuit technology, the diffusion process is used to make PN junctions or components such as resistors, capacitors, interconnect wiring, diodes and transistors in integrated circuits, and is also used for isolation between components.
Due to the inability to accurately control the distribution of doping concentration, the diffusion process has gradually been replaced by the ion implantation doping process in the manufacture of integrated circuits with wafer diameters of 200 mm and above, but a small amount is still used in heavy doping processes.
Traditional diffusion equipment is mainly horizontal diffusion furnaces, and there are also a small number of vertical diffusion furnaces.
Horizontal diffusion furnace:
It is a heat treatment equipment widely used in the diffusion process of integrated circuits with wafer diameter less than 200mm. Its characteristics are that the heating furnace body, reaction tube and quartz boat carrying wafers are all placed horizontally, so it has the process characteristics of good uniformity between wafers.
It is not only one of the important front-end equipment on the integrated circuit production line, but also widely used in diffusion, oxidation, annealing, alloying and other processes in industries such as discrete devices, power electronic devices, optoelectronic devices and optical fibers.
Vertical diffusion furnace:
Generally refers to a batch heat treatment equipment used in the integrated circuit process for wafers with a diameter of 200mm and 300mm, commonly known as a vertical furnace.
The structural features of the vertical diffusion furnace are that the heating furnace body, reaction tube and quartz boat carrying the wafer are all placed vertically, and the wafer is placed horizontally. It has the characteristics of good uniformity within the wafer, high degree of automation, and stable system performance, which can meet the needs of large-scale integrated circuit production lines.
The vertical diffusion furnace is one of the important equipment in the semiconductor integrated circuit production line and is also commonly used in related processes in the fields of power electronic devices (IGBT) and so on.
The vertical diffusion furnace is applicable to oxidation processes such as dry oxygen oxidation, hydrogen-oxygen synthesis oxidation, silicon oxynitride oxidation, and thin film growth processes such as silicon dioxide, polysilicon, silicon nitride (Si3N4), and atomic layer deposition.
It is also commonly used in high temperature annealing, copper annealing and alloying processes. In terms of diffusion process, vertical diffusion furnaces are sometimes also used in heavy doping processes.
3.2 Rapid annealing equipment
Rapid Thermal Processing (RTP) equipment is a single-wafer heat treatment equipment that can quickly raise the temperature of the wafer to the temperature required by the process (200-1300°C) and can quickly cool it down. The heating/cooling rate is generally 20-250°C/s.
In addition to a wide range of energy sources and annealing time, RTP equipment also has other excellent process performance, such as excellent thermal budget control and better surface uniformity (especially for large-sized wafers), repairing wafer damage caused by ion implantation, and multiple chambers can run different process steps simultaneously.
In addition, RTP equipment can flexibly and quickly convert and adjust process gases, so that multiple heat treatment processes can be completed in the same heat treatment process.
RTP equipment is most commonly used in rapid thermal annealing (RTA). After ion implantation, RTP equipment is needed to repair the damage caused by ion implantation, activate doped protons and effectively inhibit impurity diffusion.
Generally speaking, the temperature for repairing lattice defects is about 500°C, while 950°C is required for activating doped atoms. The activation of impurities is related to time and temperature. The longer the time and the higher the temperature, the more fully the impurities are activated, but it is not conducive to inhibiting the diffusion of impurities.
Because the RTP equipment has the characteristics of fast temperature rise/fall and short duration, the annealing process after ion implantation can achieve the optimal parameter selection among lattice defect repair, impurity activation and impurity diffusion inhibition.
RTA is mainly divided into the following four categories:
(1) Spike Annealing
Its characteristic is that it focuses on the rapid heating/cooling process, but basically has no heat preservation process. The spike annealing stays at the high temperature point for a very short time, and its main function is to activate the doping elements.
In actual applications, the wafer starts to heat up rapidly from a certain stable standby temperature point and immediately cools down after reaching the target temperature point.
Since the maintenance time at the target temperature point (i.e., the peak temperature point) is very short, the annealing process can maximize the degree of impurity activation and minimize the degree of impurity diffusion, while having good defect annealing repair characteristics, resulting in higher bonding quality and lower leakage current.
Spike annealing is widely used in ultra-shallow junction processes after 65nm. The process parameters of spike annealing mainly include peak temperature, peak dwell time, temperature divergence and wafer resistance after the process.
The shorter the peak residence time, the better. It mainly depends on the heating/cooling rate of the temperature control system, but the selected process gas atmosphere sometimes also has a certain impact on it.
For example, helium has a small atomic volume and a fast diffusion rate, which is conducive to rapid and uniform heat transfer and can reduce the peak width or peak residence time. Therefore, helium is sometimes chosen to assist heating and cooling.
(2) Lamp Annealing
Lamp annealing technology is widely used. Halogen lamps are generally used as rapid annealing heat sources. Their high heating/cooling rates and precise temperature control can meet the requirements of manufacturing processes above 65nm.
However, it cannot fully meet the stringent requirements of the 45nm process (after the 45nm process, when the nickel-silicon contact of the logic LSI occurs, the wafer needs to be quickly heated from 200°C to over 1000°C within milliseconds, so laser annealing is generally required).
(3) Laser Annealing
Laser annealing is the process of directly using laser to quickly increase the temperature of the surface of the wafer until it is enough to melt the silicon crystal, making it highly activated.
The advantages of laser annealing are extremely fast heating and sensitive control. It does not require filament heating and there are basically no problems with temperature lag and filament life.
However, from a technical point of view, laser annealing has leakage current and residue defect problems, which will also have a certain impact on device performance.
(4) Flash Annealing
Flash annealing is an annealing technology that uses high-intensity radiation to perform spike annealing on wafers at a specific preheat temperature.
The wafer is preheated to 600-800°C, and then high-intensity radiation is used for short-time pulse irradiation. When the peak temperature of the wafer reaches the required annealing temperature, the radiation is immediately turned off.
RTP equipment is increasingly used in advanced integrated circuit manufacturing.
In addition to being widely used in RTA processes, RTP equipment has also begun to be used in rapid thermal oxidation, rapid thermal nitridation, rapid thermal diffusion, rapid chemical vapor deposition, as well as metal silicide generation and epitaxial processes.
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Post time: Aug-27-2024