4″ Gallium Oxide Substrates

Short Description:

4″ Gallium Oxide Substrates – Unlock new levels of efficiency and performance in power electronics and UV devices with Semicera’s high-quality 4″ Gallium Oxide Substrates, designed for cutting-edge semiconductor applications.


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Semicera proudly introduces its 4" Gallium Oxide Substrates, a groundbreaking material engineered to meet the growing demands of high-performance semiconductor devices. Gallium Oxide (Ga2O3) substrates offer an ultra-wide bandgap, making them ideal for next-generation power electronics, UV optoelectronics, and high-frequency devices.

 

Key Features:

     • Ultra-Wide Bandgap: The 4" Gallium Oxide Substrates boast a bandgap of approximately 4.8 eV, allowing for exceptional voltage and temperature tolerance, significantly outperforming traditional semiconductor materials like silicon.

     • High Breakdown Voltage: These substrates enable devices to operate at higher voltages and powers, making them perfect for high-voltage applications in power electronics.

     • Superior Thermal Stability: Gallium Oxide substrates offer excellent thermal conductivity, ensuring stable performance under extreme conditions, ideal for use in demanding environments.

     • High Material Quality: With low defect densities and high crystal quality, these substrates ensure reliable and consistent performance, enhancing the efficiency and durability of your devices.

     • Versatile Application: Suitable for a wide range of applications, including power transistors, Schottky diodes, and UV-C LED devices, enabling innovations in both power and optoelectronic fields.

 

Explore the future of semiconductor technology with Semicera’s 4" Gallium Oxide Substrates. Our substrates are designed to support the most advanced applications, providing the reliability and efficiency required for today’s cutting-edge devices. Trust Semicera for quality and innovation in your semiconductor materials.

Items

Production

Research

Dummy

Crystal Parameters

Polytype

4H

Surface orientation error

<11-20 >4±0.15°

Electrical Parameters

Dopant

n-type Nitrogen

Resistivity

0.015-0.025ohm·cm

Mechanical Parameters

Diameter

150.0±0.2mm

Thickness

350±25 μm

Primary flat orientation

[1-100]±5°

Primary flat length

47.5±1.5mm

Secondary flat

None

TTV

≤5 μm

≤10 μm

≤15 μm

LTV

≤3 μm(5mm*5mm)

≤5 μm(5mm*5mm)

≤10 μm(5mm*5mm)

Bow

-15μm ~ 15μm

-35μm ~ 35μm

-45μm ~ 45μm

Warp

≤35 μm

≤45 μm

≤55 μm

Front(Si-face) roughness(AFM)

Ra≤0.2nm (5μm*5μm)

Structure

Micropipe density

<1 ea/cm2

<10 ea/cm2

<15 ea/cm2

Metal impurities

≤5E10atoms/cm2

NA

BPD

≤1500 ea/cm2

≤3000 ea/cm2

NA

TSD

≤500 ea/cm2

≤1000 ea/cm2

NA

Front Quality

Front

Si

Surface finish

Si-face CMP

Particles

≤60ea/wafer (size≥0.3μm)

NA

Scratches

≤5ea/mm. Cumulative length ≤Diameter

Cumulative length≤2*Diameter

NA

Orange peel/pits/stains/striations/ cracks/contamination

None

NA

Edge chips/indents/fracture/hex plates

None

Polytype areas

None

Cumulative area≤20%

Cumulative area≤30%

Front laser marking

None

Back Quality

Back finish

C-face CMP

Scratches

≤5ea/mm,Cumulative length≤2*Diameter

NA

Back defects (edge chips/indents)

None

Back roughness

Ra≤0.2nm (5μm*5μm)

Back laser marking

1 mm (from top edge)

Edge

Edge

Chamfer

Packaging

Packaging

Epi-ready with vacuum packaging

Multi-wafer cassette packaging

*Notes: "NA" means no request Items not mentioned may refer to SEMI-STD.

tech_1_2_size
SiC wafers

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